This application is related to U.S. patent application No. 170,393, entitled Exception Reporting Mechanism for a Vector Processor, by D. Bhandarkar, et al.; U.S. Pat. No. 4,949,250, entitled Method and Apparatus for Executing Instructions for a Vector Processing System, by D. Bhandarkar et al.; U.S. application No. 170,367, entitled, Method and Apparatus for Handling Asynchronous Memory Management Exceptions by a Vector Processor, by F. McKeen et al.
The invention relates to data processing systems with vector processing generally, and specifically to such data processing systems which are capable of executing multiple processes, not all of which may require vector processing.
Certain high performance data processing systems include, in addition to a main or scalar processor, a separate vector processor to process vector instructions quickly and efficiently. Vector instructions direct a processor to perform memory, arithmetic or logical operations on data represented as vectors. The main or "scalar" processor processes the other instructions, often called `scalar` instructions. Scalar instructions, for example, direct a processor to perform memory, arithmetic or logical operations on logical and scalar data.
Data processing systems that perform multi-tasking (i.e., operate several different tasks or processes) require special handling of vector registers. For example, the IBM 3090 provides multi-tasking and the CPU divides its attention between a plurality of processes. Each process is executed for a short period of time before it is switched out of main memory and another process is brought in. The switching out process is termed a "context switch." Every time a process is "switched out," the current state or context of the machine is saved and the state information of the next process to be switched in is restored.
State information can include such elements as flags (e.g. exception enable flag, etc.), status words (e.g., processor status words, program counters, etc.), scalar registers, and vector registers. All of this information must be stored so that a process that has been "switched out," can, when later "switched in," resume processing exactly where it left off when it was "switched out." The overhead associated with context switching is considerable, especially to store the vector registers. Typical vector processors contain 8 to 16 vector registers with 32 to 128 elements per register. Storage of such registers then requires storing and restoring the contents of 256 to 2048 register elements.
The IBM 3090 uses write flags to avoid switching out every vector register every time a context switch occurs. Whenever a vector register is written to during the execution of a process, a corresponding write flag is set. When the current process is switched out, only the contents of those vector registers that were written to during the execution of the process are saved. This allows the operating system to save only the contents of registers that have been changed since the last save, although at considerable hardware and software expense.
Although this procedure reduces the number of vector registers that need to be saved at every context switch, new register values must be restored for all vector registers before executing the next process. Because no attempt is made to ascertain whether the execution of the next process will require the contents of any of the vector registers, the effort may have been unnecessary.
Thus the saving of an old state and the restoring of a new state at every context switch, even if done only partially as with the IBM 3090, creates significant overhead, especially when a large number of processes are sharing the processor, but only a few processes use vector instructions.